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<div class="header">
  <div class="summary">
<a href="#define-members">Macros</a>  </div>
  <div class="headertitle"><div class="title">PMU Events for Cortex-M85<div class="ingroups"><a class="el" href="group__pmu8__functions.html">PMU Functions for Armv8.1-M</a></div></div></div>
</div><!--header-->
<div class="contents">

<p>IDs for additional events defined for Cortex-M85.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga69917e08b8f2f6cba809a715f437f21b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga69917e08b8f2f6cba809a715f437f21b">ARMCM85_PMU_AXI_READ_ACCESS</a>&#160;&#160;&#160;0xC303</td></tr>
<tr class="memdesc:ga69917e08b8f2f6cba809a715f437f21b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any beat access to M-AXI read interface.  <br /></td></tr>
<tr class="separator:ga69917e08b8f2f6cba809a715f437f21b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga572f1199d3b92b6dcbe81eb041894e56"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga572f1199d3b92b6dcbe81eb041894e56">ARMCM85_PMU_AXI_WRITE_ACCESS</a>&#160;&#160;&#160;0xC302</td></tr>
<tr class="memdesc:ga572f1199d3b92b6dcbe81eb041894e56"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any beat access to M-AXI write interface <br  />
  <br /></td></tr>
<tr class="separator:ga572f1199d3b92b6dcbe81eb041894e56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3c87b378d4c60d45f856f1d7b40016f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gae3c87b378d4c60d45f856f1d7b40016f">ARMCM85_PMU_DOSTIMEOUT_DOUBLE</a>&#160;&#160;&#160;0xC400</td></tr>
<tr class="memdesc:gae3c87b378d4c60d45f856f1d7b40016f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress.  <br /></td></tr>
<tr class="separator:gae3c87b378d4c60d45f856f1d7b40016f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0da0d8e33124fdad9ddf6e30593984d4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga0da0d8e33124fdad9ddf6e30593984d4">ARMCM85_PMU_DOSTIMEOUT_TRIPLE</a>&#160;&#160;&#160;0xC401</td></tr>
<tr class="memdesc:ga0da0d8e33124fdad9ddf6e30593984d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired three times and blocked the LSU to force forward progress.  <br /></td></tr>
<tr class="separator:ga0da0d8e33124fdad9ddf6e30593984d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae70f7f317a52afd5731c0ff0c3ff9c05"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gae70f7f317a52afd5731c0ff0c3ff9c05">ARMCM85_PMU_ECC_ERR</a>&#160;&#160;&#160;0xC000</td></tr>
<tr class="memdesc:gae70f7f317a52afd5731c0ff0c3ff9c05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error.  <br /></td></tr>
<tr class="separator:gae70f7f317a52afd5731c0ff0c3ff9c05"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga020d8f50262e33a2826c814ad12783ca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga020d8f50262e33a2826c814ad12783ca">ARMCM85_PMU_ECC_ERR_DCACHE</a>&#160;&#160;&#160;0xC010</td></tr>
<tr class="memdesc:ga020d8f50262e33a2826c814ad12783ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the data cache.  <br /></td></tr>
<tr class="separator:ga020d8f50262e33a2826c814ad12783ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac70ea7660a83ea28497a7bda50de3047"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gac70ea7660a83ea28497a7bda50de3047">ARMCM85_PMU_ECC_ERR_DTCM</a>&#160;&#160;&#160;0xC020</td></tr>
<tr class="memdesc:gac70ea7660a83ea28497a7bda50de3047"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the DTCM.  <br /></td></tr>
<tr class="separator:gac70ea7660a83ea28497a7bda50de3047"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga581a5faed9ba8cc8f2221bde40c86451"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga581a5faed9ba8cc8f2221bde40c86451">ARMCM85_PMU_ECC_ERR_ICACHE</a>&#160;&#160;&#160;0xC011</td></tr>
<tr class="memdesc:ga581a5faed9ba8cc8f2221bde40c86451"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the instruction cache.  <br /></td></tr>
<tr class="separator:ga581a5faed9ba8cc8f2221bde40c86451"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa4cd5104cb4dc96fc0921bc419fd8bcb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaa4cd5104cb4dc96fc0921bc419fd8bcb">ARMCM85_PMU_ECC_ERR_ITCM</a>&#160;&#160;&#160;0xC021</td></tr>
<tr class="memdesc:gaa4cd5104cb4dc96fc0921bc419fd8bcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the ITCM.  <br /></td></tr>
<tr class="separator:gaa4cd5104cb4dc96fc0921bc419fd8bcb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga87416ca50213e93d39c7f3653a51cbf0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga87416ca50213e93d39c7f3653a51cbf0">ARMCM85_PMU_ECC_ERR_MBIT</a>&#160;&#160;&#160;0xC001</td></tr>
<tr class="memdesc:ga87416ca50213e93d39c7f3653a51cbf0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error.  <br /></td></tr>
<tr class="separator:ga87416ca50213e93d39c7f3653a51cbf0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7d0a66f89539bee090a467ed129c976"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaa7d0a66f89539bee090a467ed129c976">ARMCM85_PMU_ECC_ERR_MBIT_DCACHE</a>&#160;&#160;&#160;0xC012</td></tr>
<tr class="memdesc:gaa7d0a66f89539bee090a467ed129c976"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error in the data cache.  <br /></td></tr>
<tr class="separator:gaa7d0a66f89539bee090a467ed129c976"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab47c7d27f850255dfb36f900f7e73662"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gab47c7d27f850255dfb36f900f7e73662">ARMCM85_PMU_ECC_ERR_MBIT_DTCM</a>&#160;&#160;&#160;0xC022</td></tr>
<tr class="memdesc:gab47c7d27f850255dfb36f900f7e73662"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error in the DTCM.  <br /></td></tr>
<tr class="separator:gab47c7d27f850255dfb36f900f7e73662"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaadd9a38aa7faace5377f218adaa43bfa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaadd9a38aa7faace5377f218adaa43bfa">ARMCM85_PMU_ECC_ERR_MBIT_ICACHE</a>&#160;&#160;&#160;0xC013</td></tr>
<tr class="memdesc:gaadd9a38aa7faace5377f218adaa43bfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-biy ECC error in the instruction cache.  <br /></td></tr>
<tr class="separator:gaadd9a38aa7faace5377f218adaa43bfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d021fffa9fc925f9a4003e6fa2aa763"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga8d021fffa9fc925f9a4003e6fa2aa763">ARMCM85_PMU_ECC_ERR_MBIT_ITCM</a>&#160;&#160;&#160;0xC023</td></tr>
<tr class="memdesc:ga8d021fffa9fc925f9a4003e6fa2aa763"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any multi-bit ECC error in the ITCM.  <br /></td></tr>
<tr class="separator:ga8d021fffa9fc925f9a4003e6fa2aa763"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1a47ab7540fcb40c2b815ffd82ec824"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gac1a47ab7540fcb40c2b815ffd82ec824">ARMCM85_PMU_NWAMODE</a>&#160;&#160;&#160;0xC201</td></tr>
<tr class="memdesc:gac1a47ab7540fcb40c2b815ffd82ec824"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write-allocate store is not allocated into the data cache due to no-write-allocate mode.  <br /></td></tr>
<tr class="separator:gac1a47ab7540fcb40c2b815ffd82ec824"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf35276be353571bce8ebc14853836ec3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaf35276be353571bce8ebc14853836ec3">ARMCM85_PMU_NWAMODE_ENTER</a>&#160;&#160;&#160;0xC200</td></tr>
<tr class="memdesc:gaf35276be353571bce8ebc14853836ec3"><td class="mdescLeft">&#160;</td><td class="mdescRight">No write-allocate mode entry.  <br /></td></tr>
<tr class="separator:gaf35276be353571bce8ebc14853836ec3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5ec8b67556e5864e42e49f369db8c380"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga5ec8b67556e5864e42e49f369db8c380">ARMCM85_PMU_PAHB_ACCESS</a>&#160;&#160;&#160;0xC301</td></tr>
<tr class="memdesc:ga5ec8b67556e5864e42e49f369db8c380"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the P-AHB interface.  <br /></td></tr>
<tr class="separator:ga5ec8b67556e5864e42e49f369db8c380"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad97c2ebda3f9ed6b056927757a5d14f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gad97c2ebda3f9ed6b056927757a5d14f5">ARMCM85_PMU_PF_CANCEL</a>&#160;&#160;&#160;0xC101</td></tr>
<tr class="memdesc:gad97c2ebda3f9ed6b056927757a5d14f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">A prefetcher stops prefetching.  <br /></td></tr>
<tr class="separator:gad97c2ebda3f9ed6b056927757a5d14f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa3c0cd7a15352eeb562948e32a000d28"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gaa3c0cd7a15352eeb562948e32a000d28">ARMCM85_PMU_PF_DROP_LINEFILL</a>&#160;&#160;&#160;0xC102</td></tr>
<tr class="memdesc:gaa3c0cd7a15352eeb562948e32a000d28"><td class="mdescLeft">&#160;</td><td class="mdescRight">A linefill triggered by a prefetcher has been dropped because of lack of buffering.  <br /></td></tr>
<tr class="separator:gaa3c0cd7a15352eeb562948e32a000d28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32b75485bd63ce7721ce2b6d97299969"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#ga32b75485bd63ce7721ce2b6d97299969">ARMCM85_PMU_PF_LINEFILL</a>&#160;&#160;&#160;0xC100</td></tr>
<tr class="memdesc:ga32b75485bd63ce7721ce2b6d97299969"><td class="mdescLeft">&#160;</td><td class="mdescRight">A prefetcher starts a line-fill.  <br /></td></tr>
<tr class="separator:ga32b75485bd63ce7721ce2b6d97299969"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0bb2c5de55106be371e98863f89eef6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm85.html#gad0bb2c5de55106be371e98863f89eef6">ARMCM85_PMU_SAHB_ACCESS</a>&#160;&#160;&#160;0xC300</td></tr>
<tr class="memdesc:gad0bb2c5de55106be371e98863f89eef6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the S-AHB interface to the TCM.  <br /></td></tr>
<tr class="separator:gad0bb2c5de55106be371e98863f89eef6"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<p>IDs for additional events defined for Cortex-M85. </p>
<p>These events are available on a Cortex-M85 device including a PMU. </p>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="ga69917e08b8f2f6cba809a715f437f21b" name="ga69917e08b8f2f6cba809a715f437f21b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga69917e08b8f2f6cba809a715f437f21b">&#9670;&#160;</a></span>ARMCM85_PMU_AXI_READ_ACCESS</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_AXI_READ_ACCESS&#160;&#160;&#160;0xC303</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any beat access to M-AXI read interface. </p>

</div>
</div>
<a id="ga572f1199d3b92b6dcbe81eb041894e56" name="ga572f1199d3b92b6dcbe81eb041894e56"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga572f1199d3b92b6dcbe81eb041894e56">&#9670;&#160;</a></span>ARMCM85_PMU_AXI_WRITE_ACCESS</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_AXI_WRITE_ACCESS&#160;&#160;&#160;0xC302</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any beat access to M-AXI write interface <br  />
 </p>

</div>
</div>
<a id="gae3c87b378d4c60d45f856f1d7b40016f" name="gae3c87b378d4c60d45f856f1d7b40016f"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae3c87b378d4c60d45f856f1d7b40016f">&#9670;&#160;</a></span>ARMCM85_PMU_DOSTIMEOUT_DOUBLE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
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          <td class="memname">#define ARMCM85_PMU_DOSTIMEOUT_DOUBLE&#160;&#160;&#160;0xC400</td>
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<p>Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress. </p>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga0da0d8e33124fdad9ddf6e30593984d4">&#9670;&#160;</a></span>ARMCM85_PMU_DOSTIMEOUT_TRIPLE</h2>

<div class="memitem">
<div class="memproto">
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          <td class="memname">#define ARMCM85_PMU_DOSTIMEOUT_TRIPLE&#160;&#160;&#160;0xC401</td>
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      </table>
</div><div class="memdoc">

<p>Denial of Service timeout has fired three times and blocked the LSU to force forward progress. </p>

</div>
</div>
<a id="gae70f7f317a52afd5731c0ff0c3ff9c05" name="gae70f7f317a52afd5731c0ff0c3ff9c05"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae70f7f317a52afd5731c0ff0c3ff9c05">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR&#160;&#160;&#160;0xC000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any ECC error. </p>

</div>
</div>
<a id="ga020d8f50262e33a2826c814ad12783ca" name="ga020d8f50262e33a2826c814ad12783ca"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga020d8f50262e33a2826c814ad12783ca">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_DCACHE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_DCACHE&#160;&#160;&#160;0xC010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any ECC error in the data cache. </p>

</div>
</div>
<a id="gac70ea7660a83ea28497a7bda50de3047" name="gac70ea7660a83ea28497a7bda50de3047"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac70ea7660a83ea28497a7bda50de3047">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_DTCM</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_DTCM&#160;&#160;&#160;0xC020</td>
        </tr>
      </table>
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<p>Any ECC error in the DTCM. </p>

</div>
</div>
<a id="ga581a5faed9ba8cc8f2221bde40c86451" name="ga581a5faed9ba8cc8f2221bde40c86451"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga581a5faed9ba8cc8f2221bde40c86451">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_ICACHE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_ICACHE&#160;&#160;&#160;0xC011</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any ECC error in the instruction cache. </p>

</div>
</div>
<a id="gaa4cd5104cb4dc96fc0921bc419fd8bcb" name="gaa4cd5104cb4dc96fc0921bc419fd8bcb"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa4cd5104cb4dc96fc0921bc419fd8bcb">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_ITCM</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_ITCM&#160;&#160;&#160;0xC021</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any ECC error in the ITCM. </p>

</div>
</div>
<a id="ga87416ca50213e93d39c7f3653a51cbf0" name="ga87416ca50213e93d39c7f3653a51cbf0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga87416ca50213e93d39c7f3653a51cbf0">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
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          <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT&#160;&#160;&#160;0xC001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any multi-bit ECC error. </p>

</div>
</div>
<a id="gaa7d0a66f89539bee090a467ed129c976" name="gaa7d0a66f89539bee090a467ed129c976"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa7d0a66f89539bee090a467ed129c976">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_DCACHE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_DCACHE&#160;&#160;&#160;0xC012</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any multi-bit ECC error in the data cache. </p>

</div>
</div>
<a id="gab47c7d27f850255dfb36f900f7e73662" name="gab47c7d27f850255dfb36f900f7e73662"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab47c7d27f850255dfb36f900f7e73662">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_DTCM</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_DTCM&#160;&#160;&#160;0xC022</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any multi-bit ECC error in the DTCM. </p>

</div>
</div>
<a id="gaadd9a38aa7faace5377f218adaa43bfa" name="gaadd9a38aa7faace5377f218adaa43bfa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaadd9a38aa7faace5377f218adaa43bfa">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_ICACHE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_ICACHE&#160;&#160;&#160;0xC013</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any multi-biy ECC error in the instruction cache. </p>

</div>
</div>
<a id="ga8d021fffa9fc925f9a4003e6fa2aa763" name="ga8d021fffa9fc925f9a4003e6fa2aa763"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga8d021fffa9fc925f9a4003e6fa2aa763">&#9670;&#160;</a></span>ARMCM85_PMU_ECC_ERR_MBIT_ITCM</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_ECC_ERR_MBIT_ITCM&#160;&#160;&#160;0xC023</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Any multi-bit ECC error in the ITCM. </p>

</div>
</div>
<a id="gac1a47ab7540fcb40c2b815ffd82ec824" name="gac1a47ab7540fcb40c2b815ffd82ec824"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac1a47ab7540fcb40c2b815ffd82ec824">&#9670;&#160;</a></span>ARMCM85_PMU_NWAMODE</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_NWAMODE&#160;&#160;&#160;0xC201</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Write-allocate store is not allocated into the data cache due to no-write-allocate mode. </p>

</div>
</div>
<a id="gaf35276be353571bce8ebc14853836ec3" name="gaf35276be353571bce8ebc14853836ec3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf35276be353571bce8ebc14853836ec3">&#9670;&#160;</a></span>ARMCM85_PMU_NWAMODE_ENTER</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_NWAMODE_ENTER&#160;&#160;&#160;0xC200</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>No write-allocate mode entry. </p>

</div>
</div>
<a id="ga5ec8b67556e5864e42e49f369db8c380" name="ga5ec8b67556e5864e42e49f369db8c380"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga5ec8b67556e5864e42e49f369db8c380">&#9670;&#160;</a></span>ARMCM85_PMU_PAHB_ACCESS</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_PAHB_ACCESS&#160;&#160;&#160;0xC301</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Read or write access on the P-AHB interface. </p>

</div>
</div>
<a id="gad97c2ebda3f9ed6b056927757a5d14f5" name="gad97c2ebda3f9ed6b056927757a5d14f5"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad97c2ebda3f9ed6b056927757a5d14f5">&#9670;&#160;</a></span>ARMCM85_PMU_PF_CANCEL</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_PF_CANCEL&#160;&#160;&#160;0xC101</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>A prefetcher stops prefetching. </p>

</div>
</div>
<a id="gaa3c0cd7a15352eeb562948e32a000d28" name="gaa3c0cd7a15352eeb562948e32a000d28"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa3c0cd7a15352eeb562948e32a000d28">&#9670;&#160;</a></span>ARMCM85_PMU_PF_DROP_LINEFILL</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_PF_DROP_LINEFILL&#160;&#160;&#160;0xC102</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>A linefill triggered by a prefetcher has been dropped because of lack of buffering. </p>

</div>
</div>
<a id="ga32b75485bd63ce7721ce2b6d97299969" name="ga32b75485bd63ce7721ce2b6d97299969"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga32b75485bd63ce7721ce2b6d97299969">&#9670;&#160;</a></span>ARMCM85_PMU_PF_LINEFILL</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_PF_LINEFILL&#160;&#160;&#160;0xC100</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>A prefetcher starts a line-fill. </p>

</div>
</div>
<a id="gad0bb2c5de55106be371e98863f89eef6" name="gad0bb2c5de55106be371e98863f89eef6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gad0bb2c5de55106be371e98863f89eef6">&#9670;&#160;</a></span>ARMCM85_PMU_SAHB_ACCESS</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define ARMCM85_PMU_SAHB_ACCESS&#160;&#160;&#160;0xC300</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Read or write access on the S-AHB interface to the TCM. </p>

</div>
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